CHAPTER ONE
1.1 Introduction
To Low Noise Amplifier (LNA)
Low Noise Amplifier (LNA) is an
electronic amplifier used to amplify possibly very weak signals (for example,
captured by an antenna). It is usually located very close to the detection
device to reduce losses in the feed line. This active antenna arrangement is
frequently used in microwave systems like GPS, because coaxial cable feed line
is very lossy at microwave frequencies, i.e. a loss of 10% coming from few
meters of cable would cause a 10% degradation of the Signal to Noise
Ratio(SNR).
Low
Noise Amplifiers represent the basic building blocks of the communication
system. The purpose of the LNA is to amplify the received signal to acceptable
levels while minimizing the noise it adds. The function of Low Noise
Amplifier(LNA) is to amplify low level signals and maintain a very low noise.
Additionally, for large signal levels, the LNA will amplify the received
signals without introducing any noise, hence eliminating channel interference.
A Low Noise Amplifier plays an undisputed importance in the receiver. LNA is
located at the first stage of microwave receiver and it has dominant effect on
the noise performance of the overall system.
1.2 Background Information
The LNA function plays an undisputed
importance in the receiver design. Its main function is to amplify extremely
low signals without adding noise, thus preserving required signal to noise
ratio of the system at extremely low power levels.
Additionally, for high signal levels,
the LNA amplifies the received signal without introducing any distortions,
hence eliminating channel interference. Due to complexity of the signals in
today’s digital communications, additional design considerations need to be
addressed during a LNA design procedure. (Mercer, 1998).
Wireless communications are very lossy,
so signals travelling from far away normally suffer from a lot of degradation.
Hence, the LNA is located very close to the antenna; in fact the first
component after the antenna is the Low Noise Amplifier (LNA). A LNA is the
combination of low noise, high gain and stability over the entire range of
operating frequency.
In radiometer cases where the
temperature is sensed by the antenna and from the antenna output received
signal is amplified and purified from noise, the design of the LNA presents a
challenging task when compared with other RF components. (Khan, 2008).
1.3 Problem
Statement
This
research study is meant to compensate for the inevitable attenuation of the
extremely weak signal received during transmission at the receiver, and to keep
introduced noise (unwanted signals) at a low level relative to the signal. The
low noise amplifier (LNA) provides considerable amplification of signal with
minimal noise as the frequency of the signal used in communication system
continues increase. The issue of signal propagation has been in existence, loss
of signal, high level of noise at the receiving end, fading, multipath etc.
1.4 Aim
And Objective
This
study aims to:
i.
Design a high sensitive and high
frequency low noise amplifier (LNA); and
ii.
Simulate the design at a frequency range
of 900MHz – 2.5GHz.
Objective
The
specific objectives are:
analyze
and simulate various designs of high frequency (900MHz – 2.5GHz) low noise
amplifier (LNA);
i.
To design and simulate a low noise
amplifier(LNA) to operate at 2.2GHZ.
ii.
Evaluate the sensitivity of the design
1.5 Significance of the Project
Low Noise Amplifiers (LNA) are the building blocks of any communication system.
LNAs are used in various applications like ISM Radios(Industrial, Scientific
and Medical), Cellular/PCS Handsets, GPS(Global Positioning System) Receivers,
Cordless Phones, Wireless Local Area Networks(WLANs), Wireless Data, Automotive
RKE(Remote Keyless System) and Satellite Communications.
1.6 Scope Of The Project
The scope of this project is to design
and simulation of low noise amplifier(LNA) using Multisim 10.0 with design
goals of noise figure of <1db -123.95bm.="" 4.998ma="" and="" ic="" of="" receiver="" sensitivity="" span="">
1.7 Expected
Contribution To Knowledge
The
research work will contribute to knowledge by providing a design and simulation
for high frequency and low noise amplifier with the help of Multisim 10.0 as
the application software.
.
CHAPTER TWO
LITERATURE REVIEW
2.1 Historical
Background
James
Clerk Maxwell was the first person to prove that electromagnetic waves existed
in 1864 (Campbell et al, 1882). In 1887,
a German named Heinrich Hertz demonstrated these new waves by using spark gap
equipment to transmit and receive radio or "Hertzian waves", as they
were first called. He also used the experiment to prove Maxwell’s theory (Kumar
et al, 2011).
The
practical applications of the wireless communication and remote control
technology were implemented by Nikola Tesla in 1890s (Gunarta, 2011).
The
world's first radio receiver (thunderstorm register) was designed by Alexander
Stepanovich Popov, and it was first seen at the All-Russia Exhibition in 1896.
He was the first to demonstrate the practical application of electromagnetic
(radio) waves (Gunarta, 2011).
A device called a
coherer became the basis for receiving radio signals. The first person to use
the device to detect radio waves was a Frenchman named Edouard Branly, while
Oliver Lodge popularized it when he gave a lecture in 1898 in honour of Hertz.
Lodge also made improvements to the coherer (Poole, 2003).
Many
experimenters at the time believed that these new waves could be used to
communicate over great distances and made significant improvements to both
radio receiving and transmitting apparatus. In 1895 Marconi demonstrated the
first viable radio system, leading to transatlantic radio communication in
December 1901.
The
honor was later contested as he was found to be using equipment and designs of
other experimenters that held the patents at that time (Poole, 2003). An American named Lee de
Forest, a competitor to Marconi, set about to develop receiver technology that
did not infringe any patents to which Marconi had access. He took out a number
of patents in the period between 1905 and 1907 covering a variety of
developments that culminated in the form of the triode valve in which there was
a third electrode called a grid. He called this an audion tube (Adams, 2012).
One
of the first areas in which valves were used was in the manufacture of
telephone repeaters, and although the performance was poor, they gave
significant improvement in long distance telephone receiving circuits.
With
the discovery that triode valves could amplify signals it was soon noticed that
they would also oscillate, a fact that was exploited in generating signals.
Once the triode was established as an amplifier it made a tremendous difference
to radio receiver performance as it allowed the incoming signals to be
amplified. One way that proved very successful was introduced in 1913 and
involved the use of positive feedback in the form of a regenerative detector.
This gave significant improvements in the levels of gain that could be
achieved, greatly increasing selectivity, enabling this type of receiver to
outperform all other types of the era. With the outbreak of the First World
War, there was a great impetus to develop radio receiving technology further.
An American named Irving Langmuir helped introduce a new generation of totally
air-evacuated "hard" valves. H. J. Round undertook some work on this
and in 1916 he produced a number of valves with the grid connection taken out
of the top of the envelope away from the anode connection (Barlow, 2007). By the
1920s, the Tuned Radio Frequency receiver (TRF) represented a major improvement
in performance over what had been available before, it still fell short of the
needs for some of the new applications. To enable receiver technology to meet
the needs placed upon it a number of new ideas started to surface. One of these
was a new form of direct conversion receiver. Here an internal or local
oscillator was used to beat with the incoming signal to produce an audible
signal that could be amplified by an audio amplifier.
2.2 Previous Studies Relevant To The Project
According to ( Shouxian 2006) the LNA is the first active amplification
block in the receiving path of an RF receiver as shown in Figure 1 below. In
fact, the performance of the RF receiver is significantly influenced by the
LNA. Being the first block of the receiver, the LNA plays a crucial role in
amplifying the received signal while adding little noise to it. In addition,
the input of the LNA needs to be matched to the output of the filter following
the antenna to prevent the incoming signal from reflecting back and forth
between the LNA and the antenna.
Fig.1 RF Receiver
Over the years, people have tried
various structures to achieve ultra-wideband
operation. Using common-source topology
will require building band-pass filters at the input which requires
area-consuming reactive components like inductors and capacitors. Poor
isolation between input and output node (gate and drain) of such topology will
almost always require cascoding another MOSFET which is not favored with the
downscaling of feature size due to lower supply voltage (Chang, Wu and Jou,
2007).
Upcoming applications in cognitive
radios, multi-band/multi-standard radios and ultra-wideband (UWB) communication
cover frequencies from 1GHz up to 10 GHz. Such applications will require the
radio able to operate from 1GHz to 10GHz. This means the low noise amplifier
(LNA) used for the transceiver needs to have low noise figure, enough power
gain, good input impedance matching and good linearity at radio frequencies up
to 10 GHz. Cognitive radio is a technology that is intended to solve the
problem of inefficient use of radio frequency spectrum ( Mitola, 2000).
In
this chapter, a review on two main receiver architectures is presented, and
then key performance parameters for RF communication circuit design are
discussed. Following that are an introduction to LNAs and trade-offs in LNA
design. Next, the input matching architectures in LNA designs will be
classified and examined. Finally, the LNA load tuning techniques will be
discussed.
Receiver Architectures
Complexity,
cost, power dissipation and the number of external components have been the
primary criteria in selecting receiver architectures. Two architectures will be
discussed which are: heterodyne and homodyne receiver.
Fig.2:
Heterodyne Receiver Architecture
The
heterodyne receiver is probably the most popular receiver architecture. Due to
its reliable performance, it has been widely implemented in many radio
applications. As seen in Figure 3, the incoming signal is first filtered by an
RF filter to lower unwanted out-of-band signals. After being amplified by an
LNA, the signal is then filtered by the image-reject (IR) filter to further
reduce the power level of undesired signals. Next, the RF signal is
down-converted to the intermediate frequency (IF). This step is done by a mixer
- There are two types of mixer: active
and passive. The active mixer consumes dc power while providing active
gain. The passive one does not consumes power but having some conversion loss.
To counterbalance for the lack of gain in the passive mixer, more gain is
needed in the LNA stage. After passing through a narrow-band IF filter, the
signal is converted to baseband signal for further processing in subsequent
stages. Intermediate frequency (IF) is a critical parameter in heterodyne
receiver design. The choosing of IF frequency involves a fundamental tradeoff
between image rejection and channel selection or sensitivity and selectivity.
More specifically, a higher IF eases image rejection because the image
frequency is further away from the desired frequency. A high IF leads to
substantial rejection of the image whereas a low IF allows great suppression of
nearby interferers. The choice of IF therefore depends on trade-offs among
three parameters: the amount of image noise, the spacing between the desired
band and the image, and the loss of the image reject filter. To minimize the
image, one can either increase the IF or tolerate greater loss in the filter
while increasing its quality factor.
Fig. 3:Dual-IF Receiver
The
multiple down-conversion helps to relax the Q requirement of the channel select
filter, therefore ease the trade-off between selectivity and sensitivity (C. C.
Boon, 2008). Shown in Figure 3 is
the dual-IF receiver which employs two stages of down conversion. A superior
performance with respect to selectivity, sensitivity and signal-to-noise ratio
(SNR) makes the heterodyne receiver very attractive. However, the
implementation of a heterodyne architecture involves many high-Q filters. The
full integration of heterodyne receiver is very difficult. In order to avoid
the needs of external IR and IF filters, direct conversion (zero-IF) and low-IF
architectures have increasingly gained popularity in recent designs of wireless
communication systems (IEEE Journal of Solid-State Circuits, Jul. 2005).
2.2.2 Homodyne Receiver (Direct
Conversion Receiver)
A
homodyne receiver is also called a zero-IF or direct conversion receiver. For
double-sideband amplitude modulated signals, down conversion can be done with
simple mixers. For frequency and phase modulated signals, down conversion must
be performed with quadrature mixers so as to avoid loss of information due to
positive and the negative part of the spectra overlap after down-conversion.
The block diagram of homodyne or direct conversion receiver architecture is
illustrated in Figure 4 below
Fig,4: Homodyne receiver architecture
A homodyne receiver structure is very
similar to the low-IF receiver. The main difference is that it down-converts RF
signal frequencies directly to base band frequencies. The simplicity of the
homodyne architecture offers two important advantages over a heterodyne
counterpart. Firstly, the problem of image is circumvented because WIf is equal to zero. As a result, no IR filter
is required, and the LNA need not drive a 50Ω impedance of an off-chip IR
filter, which reduces the overall power consumption. Secondly, the IF filter
and subsequent down-conversion stages are replaced with low-pass filters and
base band amplifiers that are amenable to monolithic integration ( Razavi,
2006).
However, despite its simplicity, the homodyne
receiver does have some other performance issues that impede its widespread
adoption. Its main disadvantage is the DC offset problem. In the homodyne
topology, the IF frequency is at base band, any DC offset can easily overwhelm
the desired signal and saturate the following stages. The isolation between the
LO port and the input of the mixer and the LNA is not perfect. There is a
finite amount of feed-through exists from the LO port to the LNA input and
mixer input. This leakage signal is then mixed with the LO signal, thus
generating a dc component. This phenomenon is called “self-mixing”. A similar
effect occurs if a large interferer leaks from the LNA or mixer input to the LO
port and is multiplied by itself. Another serious problem of homodyne
receiver is the I/Q mismatch. Due to the quadrature mixing requirement, either
the RF signal of the LO output has to be shifted by 900. Since
shifting the RF signal generally causes severe noise-power-gain trade-offs, it
is more plausible to use the topology in Figure 5 I/Q amplitude and phase
mismatch can cause degraded SNR performance.
2.3 Design
Parameters
2.3.1 Sensitivity
RF receiver sensitivity quantifies
the ability to respond to a weak signal. It is defined as the minimum
detectable signal (MDS) power level with the requirement of the specified SNR
for an analog receiver and bit-error-rate (BER) for a digital receiver.
IEEE 802.15.4 Requirement:
Sensitivity
According to (N.-J. Oh and S.-G. Lee,
2006), The sensitivity requirement of an IEEE 802.15.4 standard compliant
receiver is -85 dBm
2.3.2 Noise figure
Noise
factor (F) is a measurement of the noise performance of a circuit. It is
frequently expressed in decibels and commonly referred to as noise figure (NF):
(2.1)
where F is defined as:
(2.3)
Where SNRin and SNRout are the
signal-to-noise ratios measured at the input and output and Psig denotes the input signal power and Prs represents the source resistance
noise power, both per unit bandwidth. It follows that:
(2.4)
Since the overall signal power is
distributed across the channel bandwidth, the two side of this last equation,
must be integrated over the bandwidth to obtain the total mean square power.
Thus, for a flat channel:
(2.5)
The Equation above predicts the
sensitivity as the minimum input signal that yields a given value for the
output SNR. Changing the notation slightly and expressing the quantities in dB
or dBm, we have:
(2.6)
Where Psig.min is the minimum input
level that achieves SNRout,min. we obtain Prs as the noise power that Rs
delivers to the receiver:
(2.7)
with conjugate matching at the input
and at room temperature. Equation (2.6) is thus simplified to:
(2.8)
IEEE 802.15.4 Requirement: Noise
Figure
Using the aforementioned 2 MHz
bandwidth and SNRout,min db of 0.5db (N.-J. Oh and S.-G. Lee), the required NF
is -85 - (-174) - 10log(2M) – 0.5 = 25.5 dB. Therefore the required NF assuming
a 5 dB loss preceding the LNA is 20.5 dB.
2.3.3 Harmonic distortion and
Intermodulation
The linearity of a system determines
the maximum allowable signal level to its input. All real-life systems exhibit
some degree of nonlinearity. Signal distortion is a direct consequence of the
nonlinear behavior of the devices in the circuits. The most common measures of
non-linearity are the 1-dB compression point (P1dB) and the third-order
intercept point (IP3) (B. Razavi, 2006).
2.3.3.1 The 1-dB compression point
If a sinusoid is applied to a nonlinear system, the output
generally exhibits frequency components that are integer multiples of the input
frequency. When the input signal is X(t)
= Acoswt then the output through
the system will be:
(2.9)
Where
and so on are the
corresponding equations coefficients and A is the amplitude of the input
signal x(t) in the equation (2.9), the term with the input frequency is called
the “fundamental” and the terms with higher-order frequencies are the
“harmonics”. For most circuits of interest, a3 is less than zero. Therefore,
the gain
is a decreasing
function of A (amplitude). As the input power increases, the circuit
components become saturated and the fundamental output fails to respond
linearly to the input.
2.3.3.2 The 3rd Order Intercept Point
While harmonic distortion is often
used to describe nonlinearities of analog circuits, certain cases in RF system
require other measures of non-linearity behavior. Commonly used is the “third
order intercept point measured by a “two-tone” test.
Fig. 5: Intermodulation
in a non-linear system.
When two signals with different
frequencies are applied to a non-linear system (Figure6), the output exhibits
some components that are not harmonics of the input frequencies. Called intermodulation
(IM), this phenomenon arises from “mixing” (multiplication) of the two signals.
Assume that the input signal is (t) = A1cosw1t+A2cosw2t,
then the output through the system will be:
(2.10)
Expanding the right side and
discarding dc terms and harmonics, we obtain the following intermodulation
products:
(2.11)
(2.12)
and these fundamental components:
(2.13)
As illustrated in Figure 2.6, if the
difference between W1 and W2 is small, the third-order
IM products at
and
appear in the vicinity
of W1 and W2, thus revealing
nonlinearities.
Fig. 6: Corruption of a signal due to
intermodulation between two interferers
Intermodulation is a troublesome
effect in RF system. As shown in Figure7, if a weak signal accompanied by two
strong interferers experiences third-order non-linearity, then one of the IM
products falls in the band of interest, corrupting the desired component. The
“third intercept point” (IP3) has been defined to characterize the
corruption of signals due to third-order intermodulation of two nearby
interferers. It is measured by a two-tone test where A1=A2=A. The input signal
level, where the power of the third-order IM product equals to that of the
fundamental is defined as “two-tone input-referred third-order intercept point”
(IIP3). And the corresponding output level is called the “output
third-order intercept point” (OIP3). IIP3 can be calculated as:
according to B. Razavi, 2006. IIP3
can be given as:
For a cascade of N-stage network, the
IIP3 of the system, IIP3 can be expressed as:
(C. C. Boon, 2008).
where IIP3i and Ai (i=1,2,…N)
are the IIP3 and the available power gain of the ith stage network
respectively. The equation by C.C Boon above suggests that, for the IIP3
calculation, the last stage contributes the most to the distortion of the
system. It is unlike the NF calculation, where the first stage is the most
critical. Thus it is important to end the system with a high linearity block (D.
K. Shaeffer, 1998).
IEEE 802.15.4 Requirement: IIP3 and
IP1dB
With an interfering power of −52 dBm,
a minimum signal power of −82 dBm (3 dB above minimum sensitivity level), and
an SNRout,min of 0.5 dB,
the calculated IIP3 based on equation (2.18) is −32.5 dBm, assuming a 10
dB margin. The input 1-dB gain compression point (IP1dB) needs to be
above −42.5 dBm considering IIP3 is about 10 dB higher than IP1db (B.
Razavi, 2006).
2.3.4
Dynamic Range
Dynamic range (DR) is generally
defined as the ratio of the maximum input level that the circuit can tolerate
to the minimum input level at which the circuit can provide a reasonable signal
quality. This definition is quantified in different applications differently.
“Spurious-free dynamic range” (SFDR) and blocking dynamic range (BDR)
are two commonly used definitions of the dynamic range (J. Chang, 1998). SFDR is a measure of the
receiver’s immunity to distortion generated by spurious signals.
(L. Zhu, 2008) defines the upper bound of SFDR
as the maximum input level Pin,max in a two-tone test, at which the
third-order IM products do not exceed the noise floor. The lower bound is set
by MDS. SFDR can be expressed as:
where F is the receiver's NF
plus the noise floor power Pn in
decibel scale. Pn is calculated as
which is (-174) +
10log(2M) = −111 dBm. BDR is a measure of the resilience of the receiver
to a large out-of-band blocking signal which, by driving the receiver into
compression, desensitizes it to a small desired signal (J. Chang, 1998). The upper bound of BDR is the 1-dB compression point,
and the lower bound is also MDS. When expressed in dBm, BDR is
given by:
2.4 What To Consider In Designs Of LNA
There major technology used for LNA design, they are
i.
BJT
ii.
CMOS
Characteristics between CMOS and
BJT LNAs
A
few comparison characteristics between CMOS and BJT LNAs:
i.
The DC currents of CMOS and BJT LNA’s
are close; therefore the transconductance (gm) of CMOS transistor is lower than
the BJT.
ii.
The gm/I ratio of CMOS is lower than
that of BJT.
iii.
In CMOS technologies, a high fT
is achieved through a smaller Cgs, while in BJT technologies the
same fT is obtained through a higher gm.
iv.
Smaller Cgs means CMOS tuned
circuits tend to have higher Q, a disadvantage in withstanding component or
process variation (Iulian, 2002).
BJTs
are still preferred in some high-frequency and analog applications because of
their high speed, low noise, and high output power advantages such as in some
cell phone amplifier circuits. When they are used, a small number of BJTs are
integrated into a high-density complementary MOS (CMOS) chip. Integration of
BJT and CMOS is known as the BiCMOS
technology.
NPN
transistors exhibit higher transconductance and speed than PNP transistors
because the electron mobility is larger than the hole mobility. BJTs are almost
exclusively of the NPN type since high performance is BJT’s competitive edge
over MOSFETs (Chenming, 2009).
For
low noise system, the input (front-end) stages are very important. For small
source resistances, the BJTs are the preferred devices for these stages, and
typically they have about 10 times lower level of equivalent input noise
voltage than JFETs (Konczakowska, 2010).
Fig 7: MOSFET frequency
band
Programming Tools used in the
Implementation of this Design
The
following programming tools are used in the implementation of the LNA design
namely; .NET framework, and visual studio.
The .NET Framework
The
.NET Framework provides a common set of services that application programs
written in .NET language such as C# can use to run on various operating systems
and hardware platforms. The .NET Framework is divided into two main components:
the .NET Framework Class Library and the Common Language Runtime (Joel, 2010).
The
.NET Framework Class Library consists of segment of pre-written code called
classes that provide many of the functions that you need for developing .NET
applications. For instance, the window forms classes are used for developing
window form applications. The ASP.NET classes are used for developing Web Forms
applications, and other classes let you work with databases, manage security,
access files and perform many other functions (Joel 2010).
Although
not apparent in figure.8, the classes in the .NET framework class library are
organized in a hierarchical structure. Within this structure, related classes
are organized into group called namespaces. Each namespace contains the classes
used to support a particular function. For example, the
namespace contains the classes used to create
forms and System.IO contains the classes used for work Input-Output operations
such as File and Streams operation.The Common Language Runtime (CLR) provides
the services that are needed for executing any application that is developed
with one .NET languages. This is possible because all of the .NET languages
compiled to a common intermediate language. The CLR also provides the Common
Type System that defines the data types that are used by all .NET languages
(Joel 2010).
Fig.8:
The .NET Framework
Visual Studio
Visual
Studio is Microsoft’s integrated programming environment. It lets you edit,
compile, run, and debug a C# program, all without leaving its well thought-out
environment. Visual Studio offers convenience and helps manage your programs.
It is most effective for larger projects, but it can be used to great success
with smaller programs.
Visual Studio 2008 is a fully integrated
development environment. It is designed to make the process of writing your
code, debugging it, and compiling it to an assembly to be shipped as easy as
possible. What this means is that Visual Studio gives you a very sophisticated
multiple - document - interface application in which you can do just about
everything related to developing your code. It offers these features (Christian
et al, 2008):
The IDE allows you to edit, compile, and
run a C# program and other programs
written in any of .NET languages such as J#, C++.Net, VB.Net and so on.
written in any of .NET languages such as J#, C++.Net, VB.Net and so on.
Fig.9: Visual Studio IDE
CHAPTER
THREE
METHODOLOGY
3.1
The Design Process
The design process started with studying available designs.
Some relevant circuits are reproduced and simulated using available CAD tool
(Multisim 10.0) to understand the engineering trade offs behind each design.
For each of the design studied; noise sensitivity, gain, operating frequency
were the focal parameters considered.
The design started with the direct
current (DC) and alternating current (AC) analysis of the circuit topologies,
calculations and proving which will be seen in design calculations.
Then the circuit was actualized in
Multisim 10.0 and simulated to confirm the functionality performance of the
circuit by measuring the stability factor, S-parameter, gain and operating
frequency using virtual network analyzer. The choice of either using a BJT or
MOSFET was also considered in which BJT was decided to be used. The flow chat
process of the design is drawn below.
Fig.10:
Flow Chart for LNA Design
The design specification below
explains the main concepts required for the realization of the LNA design.
3.2 Design Specifications
DC Biasing.
DC
biasing represents the first step in LNA design. The chosen DC bias circuit
should exhibit stable thermal performance and reduce the influence of hFE
spread. It also should be a cost effective and simple solution, one that does
not increase complexity of the design and preserves smallest possible size for
the overall LNA. Resistive feedback arrangement shown in Figure 9 below is the
simplest form of DC biasing
Fig.11: Typical LNA Biasing Circuit.
Two
bias feedback arrangements are possible. One with a combination of Rsup and Rb
and second one with a simple Re and Ce combination. The operation of the Rsup
and Rb is as follows: Rsup and Rb will establish a biasing point. Since the
operation of the LNA is going to be class A (constant current draw for dynamic
range of power levels), we want to have a stable biasing point (for BF822W at
10mA) over different temperatures and for different lot codes of transistors,
where a small variation in hfe can be expected. Vc in terms of Vsup and Isup
can be expressed as follows:
Vc V
sup I sup Rsup
As
Isup decreases, which could be the case with a part with lower hfe, Vc will
increase at the same time. With an increase of Vc, higher Ib will result. With
higher Ib, increase in Ic (~Isup) will take place up to a stable level set by
Rsup and Rb. The same circuit handles thermal variations well. With a
temperature increase, Isup will increase, which will lower Vc. Lower Vc will
result in lower Ib and lower Ib will lower Ic (~Isup). This circuit is
inexpensive, simple and takes very little real-estate, while its performance is
well behaved and understood. In order for Rb to have very little influence on
source matching, which is crucial for noise performance, the feedback network
should be decoupled with an inductor (making biasing invisible at RF band of
operation).
Another
possible bias feedback can be realized with emitter resistor and capacitor,
shown in shaded colors in Figure 9. With Isup (~Ie) decreasing, Ve will
decrease. Vbe will increase with a decrease in Ve. With increase in Vbe, Isup
will increase, while keeping a stable biasing point. Ce should be selected
carefully, since Re will also have a direct effect on RF gain of LNA. Ce should
present a short at frequency of operation in order to limit its influence on
gain and noise performance of the circuit.
Other
biasing methods are suitable for class A networks. These are usually closed
feedback
arrangements with dynamic bias control provided by active components (Dixit,
1994).
Although
suitable for LNA application, these active feedback bias networks increase
Complexity of the LNA network, introduce additional components and increase the
real estate Area of the solution.
More
so, The purpose of the DC bias is to select the proper quiescent point and hold
the quiescent point constant over variation in transistor parameters and temperature.
The bias circuitry should also decouple RF from DC. This is achieved by means
of blocking capacitors, which allow RF signals to pass, and RF chokes which
block the high frequency signals (Gonzalez, Guillermo. 1997).
Stability
Unconditional
stability means that with an arbitrary, passive load connected to the output of
the device, the circuit will not become unstable, i.e. will not oscillate.
Instabilities are primarily caused by three phenomena: internal feedback of the
transistor, external feedback around the transistor caused by external
circuits, or excess gain at frequencies outside of the band of operation.
The
main way of determining the stability of a device is to calculate the so-called
Rollett’s stability factor (K), which is calculated using a set of S-Parameters
for the device at the frequency of operation.
The conditions of stability at a given frequency are |Γin| < 1 and
|Γout| < 1, and must hold for all possible values ΓL & ΓS obtained using
passive matching circuits. We can calculate two stability parameters K and |Δ|
to give us an indication as to whether a device is likely to oscillate or
whether it is conditionally /unconditionally stable.
Where
The parameters K must satisfy K>1,
| |<1 0="" a="" and="" b="" be="" for="" greater="" must="" parameter="" span="" stable.="" the="" to="" transistor="" unconditionally="">
Where:
All devices with |S11| and |S22| <
1 must be stable for a passive load impedance (Lucek, Jarek, and Robbin Damen,
Sept. 2011).
Scattering Parameters
The
scattering or S-matrix is a mathematical, but also practical tool, that
quantifies how RF energy propagates through a multi-port network. The S-matrix
is what allows us to accurately describe the properties of complicated linear
networks. For an RF signal incident on one port, some fraction of the signal
bounces back out of that port, some of it scatters and exits other ports, and
some of it disappears as heat or even electromagnetic radiation. The S-matrix
for an N-port contains N2 individual S-Parameters, each one representing a
possible input-output path. The incident voltage is denoted by “a”, while the
voltage leaving a port is denoted by “b”. A generalized two-port network is
displayed in Figure 3 below.
Fig.12: Generalized two-port network
(Ludwig, Reinhold,
and Gene Bogdanov. 2009).
Here
is the matrix algebraic representation of 2-port S-parameters:
Where:
S11 is the input port voltage reflection
coefficient, and S11= b1/a1.
S12 is the reverse voltage gain, and S12= b1/a2.
S21 is the forward voltage gain, and S21= b2/a1.
S22 is the output port voltage reflection
coefficient, and S22= b2/a2. (Ludwig,
Reinhold, and Gene Bogdanov, 2009).
3.3 Design Calculations
Stage I
VBE
= 0.7V, β = 125;
Insert the values of R1 =
,
R2 =
,
R3 =10Ω, Vcc = 3V in equation 3.1
Looking at a closed loop around Ib in
the first stage transistor Q1
3.5
3.7
20k
=
)
= 37.32Ω
3.10
Input Impedance;
3.11
In decibel; 10log (0.214) =
-6.6959dB
Note Vf is parallel to Vcc
= 3V, R5=Rf = 500Ω , RL = R4 =133
Stage II
Taking a close Loop at the second
amplifier stage;
Total
Current is
3.17
3.18
;
3.19
XL2=
2πfL = 2π x 2.2 x 109 x 2.7 x 10-9 = 37.32Ω 3.20
ro = XL2 // RE =
37.32//200
3.21
3.22
In decibel = 10 log(31.45) = 14.98dB
Voltage
Gain
3.23
In Decibel
20log
=
16.6dB 3.24
Output Third Order Intercept Point
(IP3)
Input Third Order Intercept Point
(IP3)
Capacitance Calculations Of LNA
AT C1
The
input resistance at C1 is 620.29
from equation 3.26;
Hence
the
AT C2
The
input resistance at C2 is 620.29
from equation 3.26;
Hence
the
AT C3
The
resistance at C3 is 500Ω;
Hence
the
AT C4
The
resistance at C4 is
from equation 3.30;
Hence
the
Stability Of The LNA Circuit
S11
= 0.701; S12 = 0.024; S21 = 1.029; S22 = 0.749
Unconditionally
stable at 2.2 Ghz (k>1)
LNA Sensitivity
(Sandeen, 2008)
F1
is the thermal noise generated at the input resistance
F2
is the noise generated at the first stage transistor which is 2.1dB from the
datasheet, F3 is the noise generated at the second stage transistor
which is 2.1dB from the datasheet, F4 is the thermal noise generated
at the output resistance
(Kinget, 1999).
A good signal quality factor varies
from 10 – 50. Hence, assuming for a good signal quality to be 50 for this
design.
Where: BW = 2.2*109
= 44Mhz
50
Therefore:
3.4 Complete Circuit
Design Of LNA
As
shown below, the complete circuit diagram is also shown in Chapter Four as
drawn using
Multisim.
Fig.13:
Designed LNA Circuit ( Fadamiro and Ogunti, Asian Journal of Engineering
and Technology, June 2013 )
CHAPTER FOUR
Design
Simulations
In
this section, simulation results from Multisim 10.0 will be presented. Shown in
figure 12 is the simulation result of stability which determines the
effectiveness of the circuit. As stated earlier, for an LNA circuit to be
stable and effective, Delta must be lesser than one while Rollett’s stability
factor (K) must be greater than one. Other simulations are presented alongside.
Fig.14: Stability Simulation
Fig.15: Gains Simulation
Fig.16: Simulation of S-parameters
Fig.17: Simulation with an Oscilloscope
4.1 Discussions
The
design of an LNA for a wireless mode of operation at a high frequency range of
2.0 GHz - 2.2 GHz with a good gain is determined majorly by the quality of RF
transistor used in the design. The results derived after simulation using
multisim 10 are shown in fig14, fig15, fig16, and 17 while the calculated in
comparison with the simulated results are shown in the tables below.
Table
1: Calculated and Simulated results for
Delta and Rollett’s factor at 2.2GHz
Frequency (2.2GHz)
|
Calculated
|
Simulated
|
Delta (
)
|
0.50
|
0.14
|
Rollett’s Factor (K)
|
4.0
|
17.465
|
Table
2: Measurements of LNA Gains
Frequency
|
Power Gain (PG)
|
Average Power Gain (APG)
|
Total Power Gain
|
2.2GHz
|
-55.434dB
|
-47.118dB
|
-55.525dB
|
2GHz
|
-55.021dB
|
-47.169dB
|
-55.131dB
|
1.5GHz
|
-53.908dB
|
-46.34dB
|
-54.101dB
|
1GHz
|
-52.475dB
|
-45.331dB
|
-52.898dB
|
900MHz
|
-52.085dB
|
-45.069dB
|
-52.601dB
|
Table
3: Measurements of Voltages and Currents
with MULTISM
Frequency (2.2GHz)
|
Input
|
Output
|
V
|
3.90Mv
|
-318pV
|
V
(p-p)
|
9.94Mv
|
767pV
|
V
(rms)
|
3.54mV
|
275pV
|
V
(dc)
|
-428Nv
|
0V
|
I
|
390Na
|
-6.35pA
|
I
(p-p)
|
994nA
|
15.3pA
|
I
(rms)
|
353Na
|
5.50pA
|
I
(dc)
|
-42.8Pa
|
0A
|
Freq
|
2.2GHz
|
2.2GHz
|
This
design was based on 50 W
input and output impedance considering the fact that most RF designs are
designed to be 50W.
The gain and the noise generated which are very essential in LNA design are
analyzed carefully so that adequate signal propagated can be received with
minimal signal to noise ratio.
CHAPTER FIVE
RECOMMENDATION AND CONCLUSION
The
system was simulated using ADS (Multisim 10.0), an RF circuit simulator. The
design went through a series of tests and measurements for verification. The
data from these measurements was recorded, documented, and compared to the
simulated predictions. Meanwhile, there might have been several discrepancies
in the above results. Some possible discrepancies are measurement errors by the
reading, non-equality of the components and most importantly the simulating
tool used (network analyzer).
However,
The degree of success of this project was quite satisfactory. the design
proposed is efficiently used in the Wireless Communication applications for
amplifying the Wideband RF signals at 2.2GHz with a gain of 10.59dB,
sensitivity of -123.95dBm and Low Noise
Figure of -38.39dB.
Conclusively,
the time spent in studying the design process of a microwave amplifier and the designed
tools learned served as a great experience and preparation for the future
designing endeavors.
Future Work
The
amplification of this LNA has a reasonably gain value at the center frequency
of 2.2GHz. But, there might have been several discrepancies in the above
results. Some possible discrepancies are measurement errors by the reading,
non-equality of the components and most importantly the simulating tool used
(network analyzer). However, we believe that spending more time and effort in
better layout design will result in smaller lost in power gain at higher
frequencies.
Due
to the high potential of this work, here we propose several future works to be
done. Firstly, while we have covered and explored deeply on the topic of LNA,
other important blocks such as mixer, post-mixer baseband amplifier,
channel-select filter, analog to-digital converter, and frequency synthesizer
should be designed. The study on system level design for the IEEE 802.15.4
standard therefore should be deeply investigated. We believe that significantly
power consumption can be saved by further exploring the performance trade-offs
in the IEEE 802.15.4 standard. To achieve an ultra-low power system, novelty in
both system and circuit design are required.
Thirdly,
while bringing in benefit such as higher level of integration and higher ,
technology scaling also creates many issues for RFIC designer. Aggressive CMOS
technology scaling results in supply voltage reductions to well below 1V. At
low supply voltage, it is very challenging for critical blocks such as mixer
and baseband circuits to achieve sufficient linearity. Moreover, RF/analog
circuits are sensitive to leakage and process variations at deeply scaled CMOS
technologies. This requires a more accurate device modeling.
Lastly,
the unlicensed band around 60 GHz presents interesting prospects for
high-data-rate applications such as high-definition video streaming.
Furthermore, the short wavelength makes it possible to integrate one or more
antennas along with the transceiver, thus obviating the need for expensive,
millimeter-wave packaging and high-frequency electrostatic discharge (ESD)
protection devices. The heightened interest in this band for consumer applications
has motivated research on the design of 60 GHz building blocks in CMOS
technology. This is very challenging due to the lossy substrate, low ft and
fmax of current CMOS technologies. Moreover, the low Q characteristic
of an on-chip inductor has limited its usefulness in millimeter wave designs.
New design methods incorporating microwave techniques and complex passive
structures are needed to improve circuit performance. Example of such works
are: transmission lines and distributed elements are being investigated and
applied to the design of typical transceiver building blocks such as the LNA,
VCO/PLL, mixer, and PA (Doan, Emami, Niknejad, And Brodersen, 2005).
CHAPTER ONE
INTRODUCTION
1.1 Introduction
To Low Noise Amplifier (LNA)
Low Noise Amplifier (LNA) is an
electronic amplifier used to amplify possibly very weak signals (for example,
captured by an antenna). It is usually located very close to the detection
device to reduce losses in the feed line. This active antenna arrangement is
frequently used in microwave systems like GPS, because coaxial cable feed line
is very lossy at microwave frequencies, i.e. a loss of 10% coming from few
meters of cable would cause a 10% degradation of the Signal to Noise
Ratio(SNR).
Low
Noise Amplifiers represent the basic building blocks of the communication
system. The purpose of the LNA is to amplify the received signal to acceptable
levels while minimizing the noise it adds. The function of Low Noise
Amplifier(LNA) is to amplify low level signals and maintain a very low noise.
Additionally, for large signal levels, the LNA will amplify the received
signals without introducing any noise, hence eliminating channel interference.
A Low Noise Amplifier plays an undisputed importance in the receiver. LNA is
located at the first stage of microwave receiver and it has dominant effect on
the noise performance of the overall system.
1.2 Background Information
The LNA function plays an undisputed
importance in the receiver design. Its main function is to amplify extremely
low signals without adding noise, thus preserving required signal to noise
ratio of the system at extremely low power levels.
Additionally, for high signal levels,
the LNA amplifies the received signal without introducing any distortions,
hence eliminating channel interference. Due to complexity of the signals in
today’s digital communications, additional design considerations need to be
addressed during a LNA design procedure. (Mercer, 1998).
Wireless communications are very lossy,
so signals travelling from far away normally suffer from a lot of degradation.
Hence, the LNA is located very close to the antenna; in fact the first
component after the antenna is the Low Noise Amplifier (LNA). A LNA is the
combination of low noise, high gain and stability over the entire range of
operating frequency.
In radiometer cases where the
temperature is sensed by the antenna and from the antenna output received
signal is amplified and purified from noise, the design of the LNA presents a
challenging task when compared with other RF components. (Khan, 2008).
1.3 Problem
Statement
This
research study is meant to compensate for the inevitable attenuation of the
extremely weak signal received during transmission at the receiver, and to keep
introduced noise (unwanted signals) at a low level relative to the signal. The
low noise amplifier (LNA) provides considerable amplification of signal with
minimal noise as the frequency of the signal used in communication system
continues increase. The issue of signal propagation has been in existence, loss
of signal, high level of noise at the receiving end, fading, multipath etc.
1.4 Aim
And Objective
This
study aims to:
i.
Design a high sensitive and high
frequency low noise amplifier (LNA); and
ii.
Simulate the design at a frequency range
of 900MHz – 2.5GHz.
Objective
The
specific objectives are:
analyze
and simulate various designs of high frequency (900MHz – 2.5GHz) low noise
amplifier (LNA);
i.
To design and simulate a low noise
amplifier(LNA) to operate at 2.2GHZ.
ii.
Evaluate the sensitivity of the design
1.5 Significance of the Project
Low Noise Amplifiers (LNA) are the building blocks of any communication system.
LNAs are used in various applications like ISM Radios(Industrial, Scientific
and Medical), Cellular/PCS Handsets, GPS(Global Positioning System) Receivers,
Cordless Phones, Wireless Local Area Networks(WLANs), Wireless Data, Automotive
RKE(Remote Keyless System) and Satellite Communications.
1.6 Scope Of The Project
The scope of this project is to design
and simulation of low noise amplifier(LNA) using Multisim 10.0 with design
goals of noise figure of <1db -123.95bm.="" 4.998ma="" and="" ic="" of="" receiver="" sensitivity="" span="">
1.7 Expected
Contribution To Knowledge
The
research work will contribute to knowledge by providing a design and simulation
for high frequency and low noise amplifier with the help of Multisim 10.0 as
the application software.
.
CHAPTER TWO
LITERATURE REVIEW
2.1 Historical
Background
James
Clerk Maxwell was the first person to prove that electromagnetic waves existed
in 1864 (Campbell et al, 1882). In 1887,
a German named Heinrich Hertz demonstrated these new waves by using spark gap
equipment to transmit and receive radio or "Hertzian waves", as they
were first called. He also used the experiment to prove Maxwell’s theory (Kumar
et al, 2011).
The
practical applications of the wireless communication and remote control
technology were implemented by Nikola Tesla in 1890s (Gunarta, 2011).
The
world's first radio receiver (thunderstorm register) was designed by Alexander
Stepanovich Popov, and it was first seen at the All-Russia Exhibition in 1896.
He was the first to demonstrate the practical application of electromagnetic
(radio) waves (Gunarta, 2011).
A device called a
coherer became the basis for receiving radio signals. The first person to use
the device to detect radio waves was a Frenchman named Edouard Branly, while
Oliver Lodge popularized it when he gave a lecture in 1898 in honour of Hertz.
Lodge also made improvements to the coherer (Poole, 2003).
Many
experimenters at the time believed that these new waves could be used to
communicate over great distances and made significant improvements to both
radio receiving and transmitting apparatus. In 1895 Marconi demonstrated the
first viable radio system, leading to transatlantic radio communication in
December 1901.
The
honor was later contested as he was found to be using equipment and designs of
other experimenters that held the patents at that time (Poole, 2003). An American named Lee de
Forest, a competitor to Marconi, set about to develop receiver technology that
did not infringe any patents to which Marconi had access. He took out a number
of patents in the period between 1905 and 1907 covering a variety of
developments that culminated in the form of the triode valve in which there was
a third electrode called a grid. He called this an audion tube (Adams, 2012).
One
of the first areas in which valves were used was in the manufacture of
telephone repeaters, and although the performance was poor, they gave
significant improvement in long distance telephone receiving circuits.
With
the discovery that triode valves could amplify signals it was soon noticed that
they would also oscillate, a fact that was exploited in generating signals.
Once the triode was established as an amplifier it made a tremendous difference
to radio receiver performance as it allowed the incoming signals to be
amplified. One way that proved very successful was introduced in 1913 and
involved the use of positive feedback in the form of a regenerative detector.
This gave significant improvements in the levels of gain that could be
achieved, greatly increasing selectivity, enabling this type of receiver to
outperform all other types of the era. With the outbreak of the First World
War, there was a great impetus to develop radio receiving technology further.
An American named Irving Langmuir helped introduce a new generation of totally
air-evacuated "hard" valves. H. J. Round undertook some work on this
and in 1916 he produced a number of valves with the grid connection taken out
of the top of the envelope away from the anode connection (Barlow, 2007). By the
1920s, the Tuned Radio Frequency receiver (TRF) represented a major improvement
in performance over what had been available before, it still fell short of the
needs for some of the new applications. To enable receiver technology to meet
the needs placed upon it a number of new ideas started to surface. One of these
was a new form of direct conversion receiver. Here an internal or local
oscillator was used to beat with the incoming signal to produce an audible
signal that could be amplified by an audio amplifier.
2.2 Previous Studies Relevant To The Project
According to ( Shouxian 2006) the LNA is the first active amplification
block in the receiving path of an RF receiver as shown in Figure 1 below. In
fact, the performance of the RF receiver is significantly influenced by the
LNA. Being the first block of the receiver, the LNA plays a crucial role in
amplifying the received signal while adding little noise to it. In addition,
the input of the LNA needs to be matched to the output of the filter following
the antenna to prevent the incoming signal from reflecting back and forth
between the LNA and the antenna.
Fig.1 RF Receiver
Over the years, people have tried
various structures to achieve ultra-wideband
operation. Using common-source topology
will require building band-pass filters at the input which requires
area-consuming reactive components like inductors and capacitors. Poor
isolation between input and output node (gate and drain) of such topology will
almost always require cascoding another MOSFET which is not favored with the
downscaling of feature size due to lower supply voltage (Chang, Wu and Jou,
2007).
Upcoming applications in cognitive
radios, multi-band/multi-standard radios and ultra-wideband (UWB) communication
cover frequencies from 1GHz up to 10 GHz. Such applications will require the
radio able to operate from 1GHz to 10GHz. This means the low noise amplifier
(LNA) used for the transceiver needs to have low noise figure, enough power
gain, good input impedance matching and good linearity at radio frequencies up
to 10 GHz. Cognitive radio is a technology that is intended to solve the
problem of inefficient use of radio frequency spectrum ( Mitola, 2000).
In
this chapter, a review on two main receiver architectures is presented, and
then key performance parameters for RF communication circuit design are
discussed. Following that are an introduction to LNAs and trade-offs in LNA
design. Next, the input matching architectures in LNA designs will be
classified and examined. Finally, the LNA load tuning techniques will be
discussed.
Receiver Architectures
Complexity,
cost, power dissipation and the number of external components have been the
primary criteria in selecting receiver architectures. Two architectures will be
discussed which are: heterodyne and homodyne receiver.
Fig.2:
Heterodyne Receiver Architecture
The
heterodyne receiver is probably the most popular receiver architecture. Due to
its reliable performance, it has been widely implemented in many radio
applications. As seen in Figure 3, the incoming signal is first filtered by an
RF filter to lower unwanted out-of-band signals. After being amplified by an
LNA, the signal is then filtered by the image-reject (IR) filter to further
reduce the power level of undesired signals. Next, the RF signal is
down-converted to the intermediate frequency (IF). This step is done by a mixer
- There are two types of mixer: active
and passive. The active mixer consumes dc power while providing active
gain. The passive one does not consumes power but having some conversion loss.
To counterbalance for the lack of gain in the passive mixer, more gain is
needed in the LNA stage. After passing through a narrow-band IF filter, the
signal is converted to baseband signal for further processing in subsequent
stages. Intermediate frequency (IF) is a critical parameter in heterodyne
receiver design. The choosing of IF frequency involves a fundamental tradeoff
between image rejection and channel selection or sensitivity and selectivity.
More specifically, a higher IF eases image rejection because the image
frequency is further away from the desired frequency. A high IF leads to
substantial rejection of the image whereas a low IF allows great suppression of
nearby interferers. The choice of IF therefore depends on trade-offs among
three parameters: the amount of image noise, the spacing between the desired
band and the image, and the loss of the image reject filter. To minimize the
image, one can either increase the IF or tolerate greater loss in the filter
while increasing its quality factor.
Fig. 3:Dual-IF Receiver
The
multiple down-conversion helps to relax the Q requirement of the channel select
filter, therefore ease the trade-off between selectivity and sensitivity (C. C.
Boon, 2008). Shown in Figure 3 is
the dual-IF receiver which employs two stages of down conversion. A superior
performance with respect to selectivity, sensitivity and signal-to-noise ratio
(SNR) makes the heterodyne receiver very attractive. However, the
implementation of a heterodyne architecture involves many high-Q filters. The
full integration of heterodyne receiver is very difficult. In order to avoid
the needs of external IR and IF filters, direct conversion (zero-IF) and low-IF
architectures have increasingly gained popularity in recent designs of wireless
communication systems (IEEE Journal of Solid-State Circuits, Jul. 2005).
2.2.2 Homodyne Receiver (Direct
Conversion Receiver)
A
homodyne receiver is also called a zero-IF or direct conversion receiver. For
double-sideband amplitude modulated signals, down conversion can be done with
simple mixers. For frequency and phase modulated signals, down conversion must
be performed with quadrature mixers so as to avoid loss of information due to
positive and the negative part of the spectra overlap after down-conversion.
The block diagram of homodyne or direct conversion receiver architecture is
illustrated in Figure 4 below
Fig,4: Homodyne receiver architecture
A homodyne receiver structure is very
similar to the low-IF receiver. The main difference is that it down-converts RF
signal frequencies directly to base band frequencies. The simplicity of the
homodyne architecture offers two important advantages over a heterodyne
counterpart. Firstly, the problem of image is circumvented because WIf is equal to zero. As a result, no IR filter
is required, and the LNA need not drive a 50Ω impedance of an off-chip IR
filter, which reduces the overall power consumption. Secondly, the IF filter
and subsequent down-conversion stages are replaced with low-pass filters and
base band amplifiers that are amenable to monolithic integration ( Razavi,
2006).
However, despite its simplicity, the homodyne
receiver does have some other performance issues that impede its widespread
adoption. Its main disadvantage is the DC offset problem. In the homodyne
topology, the IF frequency is at base band, any DC offset can easily overwhelm
the desired signal and saturate the following stages. The isolation between the
LO port and the input of the mixer and the LNA is not perfect. There is a
finite amount of feed-through exists from the LO port to the LNA input and
mixer input. This leakage signal is then mixed with the LO signal, thus
generating a dc component. This phenomenon is called “self-mixing”. A similar
effect occurs if a large interferer leaks from the LNA or mixer input to the LO
port and is multiplied by itself. Another serious problem of homodyne
receiver is the I/Q mismatch. Due to the quadrature mixing requirement, either
the RF signal of the LO output has to be shifted by 900. Since
shifting the RF signal generally causes severe noise-power-gain trade-offs, it
is more plausible to use the topology in Figure 5 I/Q amplitude and phase
mismatch can cause degraded SNR performance.
2.3 Design
Parameters
2.3.1 Sensitivity
RF receiver sensitivity quantifies
the ability to respond to a weak signal. It is defined as the minimum
detectable signal (MDS) power level with the requirement of the specified SNR
for an analog receiver and bit-error-rate (BER) for a digital receiver.
IEEE 802.15.4 Requirement:
Sensitivity
According to (N.-J. Oh and S.-G. Lee,
2006), The sensitivity requirement of an IEEE 802.15.4 standard compliant
receiver is -85 dBm
2.3.2 Noise figure
Noise
factor (F) is a measurement of the noise performance of a circuit. It is
frequently expressed in decibels and commonly referred to as noise figure (NF):
(2.1)
where F is defined as:
(2.3)
Where SNRin and SNRout are the
signal-to-noise ratios measured at the input and output and Psig denotes the input signal power and Prs represents the source resistance
noise power, both per unit bandwidth. It follows that:
(2.4)
Since the overall signal power is
distributed across the channel bandwidth, the two side of this last equation,
must be integrated over the bandwidth to obtain the total mean square power.
Thus, for a flat channel:
(2.5)
The Equation above predicts the
sensitivity as the minimum input signal that yields a given value for the
output SNR. Changing the notation slightly and expressing the quantities in dB
or dBm, we have:
(2.6)
Where Psig.min is the minimum input
level that achieves SNRout,min. we obtain Prs as the noise power that Rs
delivers to the receiver:
(2.7)
with conjugate matching at the input
and at room temperature. Equation (2.6) is thus simplified to:
(2.8)
IEEE 802.15.4 Requirement: Noise
Figure
Using the aforementioned 2 MHz
bandwidth and SNRout,min db of 0.5db (N.-J. Oh and S.-G. Lee), the required NF
is -85 - (-174) - 10log(2M) – 0.5 = 25.5 dB. Therefore the required NF assuming
a 5 dB loss preceding the LNA is 20.5 dB.
2.3.3 Harmonic distortion and
Intermodulation
The linearity of a system determines
the maximum allowable signal level to its input. All real-life systems exhibit
some degree of nonlinearity. Signal distortion is a direct consequence of the
nonlinear behavior of the devices in the circuits. The most common measures of
non-linearity are the 1-dB compression point (P1dB) and the third-order
intercept point (IP3) (B. Razavi, 2006).
2.3.3.1 The 1-dB compression point
If a sinusoid is applied to a nonlinear system, the output
generally exhibits frequency components that are integer multiples of the input
frequency. When the input signal is X(t)
= Acoswt then the output through
the system will be:
(2.9)
Where
and so on are the
corresponding equations coefficients and A is the amplitude of the input
signal x(t) in the equation (2.9), the term with the input frequency is called
the “fundamental” and the terms with higher-order frequencies are the
“harmonics”. For most circuits of interest, a3 is less than zero. Therefore,
the gain
is a decreasing
function of A (amplitude). As the input power increases, the circuit
components become saturated and the fundamental output fails to respond
linearly to the input.
2.3.3.2 The 3rd Order Intercept Point
While harmonic distortion is often
used to describe nonlinearities of analog circuits, certain cases in RF system
require other measures of non-linearity behavior. Commonly used is the “third
order intercept point measured by a “two-tone” test.
Fig. 5: Intermodulation
in a non-linear system.
When two signals with different
frequencies are applied to a non-linear system (Figure6), the output exhibits
some components that are not harmonics of the input frequencies. Called intermodulation
(IM), this phenomenon arises from “mixing” (multiplication) of the two signals.
Assume that the input signal is (t) = A1cosw1t+A2cosw2t,
then the output through the system will be:
(2.10)
Expanding the right side and
discarding dc terms and harmonics, we obtain the following intermodulation
products:
(2.11)
(2.12)
and these fundamental components:
(2.13)
As illustrated in Figure 2.6, if the
difference between W1 and W2 is small, the third-order
IM products at
and
appear in the vicinity
of W1 and W2, thus revealing
nonlinearities.
Fig. 6: Corruption of a signal due to
intermodulation between two interferers
Intermodulation is a troublesome
effect in RF system. As shown in Figure7, if a weak signal accompanied by two
strong interferers experiences third-order non-linearity, then one of the IM
products falls in the band of interest, corrupting the desired component. The
“third intercept point” (IP3) has been defined to characterize the
corruption of signals due to third-order intermodulation of two nearby
interferers. It is measured by a two-tone test where A1=A2=A. The input signal
level, where the power of the third-order IM product equals to that of the
fundamental is defined as “two-tone input-referred third-order intercept point”
(IIP3). And the corresponding output level is called the “output
third-order intercept point” (OIP3). IIP3 can be calculated as:
according to B. Razavi, 2006. IIP3
can be given as:
For a cascade of N-stage network, the
IIP3 of the system, IIP3 can be expressed as:
(C. C. Boon, 2008).
where IIP3i and Ai (i=1,2,…N)
are the IIP3 and the available power gain of the ith stage network
respectively. The equation by C.C Boon above suggests that, for the IIP3
calculation, the last stage contributes the most to the distortion of the
system. It is unlike the NF calculation, where the first stage is the most
critical. Thus it is important to end the system with a high linearity block (D.
K. Shaeffer, 1998).
IEEE 802.15.4 Requirement: IIP3 and
IP1dB
With an interfering power of −52 dBm,
a minimum signal power of −82 dBm (3 dB above minimum sensitivity level), and
an SNRout,min of 0.5 dB,
the calculated IIP3 based on equation (2.18) is −32.5 dBm, assuming a 10
dB margin. The input 1-dB gain compression point (IP1dB) needs to be
above −42.5 dBm considering IIP3 is about 10 dB higher than IP1db (B.
Razavi, 2006).
2.3.4
Dynamic Range
Dynamic range (DR) is generally
defined as the ratio of the maximum input level that the circuit can tolerate
to the minimum input level at which the circuit can provide a reasonable signal
quality. This definition is quantified in different applications differently.
“Spurious-free dynamic range” (SFDR) and blocking dynamic range (BDR)
are two commonly used definitions of the dynamic range (J. Chang, 1998). SFDR is a measure of the
receiver’s immunity to distortion generated by spurious signals.
(L. Zhu, 2008) defines the upper bound of SFDR
as the maximum input level Pin,max in a two-tone test, at which the
third-order IM products do not exceed the noise floor. The lower bound is set
by MDS. SFDR can be expressed as:
where F is the receiver's NF
plus the noise floor power Pn in
decibel scale. Pn is calculated as
which is (-174) +
10log(2M) = −111 dBm. BDR is a measure of the resilience of the receiver
to a large out-of-band blocking signal which, by driving the receiver into
compression, desensitizes it to a small desired signal (J. Chang, 1998). The upper bound of BDR is the 1-dB compression point,
and the lower bound is also MDS. When expressed in dBm, BDR is
given by:
2.4 What To Consider In Designs Of LNA
There major technology used for LNA design, they are
i.
BJT
ii.
CMOS
Characteristics between CMOS and
BJT LNAs
A
few comparison characteristics between CMOS and BJT LNAs:
i.
The DC currents of CMOS and BJT LNA’s
are close; therefore the transconductance (gm) of CMOS transistor is lower than
the BJT.
ii.
The gm/I ratio of CMOS is lower than
that of BJT.
iii.
In CMOS technologies, a high fT
is achieved through a smaller Cgs, while in BJT technologies the
same fT is obtained through a higher gm.
iv.
Smaller Cgs means CMOS tuned
circuits tend to have higher Q, a disadvantage in withstanding component or
process variation (Iulian, 2002).
BJTs
are still preferred in some high-frequency and analog applications because of
their high speed, low noise, and high output power advantages such as in some
cell phone amplifier circuits. When they are used, a small number of BJTs are
integrated into a high-density complementary MOS (CMOS) chip. Integration of
BJT and CMOS is known as the BiCMOS
technology.
NPN
transistors exhibit higher transconductance and speed than PNP transistors
because the electron mobility is larger than the hole mobility. BJTs are almost
exclusively of the NPN type since high performance is BJT’s competitive edge
over MOSFETs (Chenming, 2009).
For
low noise system, the input (front-end) stages are very important. For small
source resistances, the BJTs are the preferred devices for these stages, and
typically they have about 10 times lower level of equivalent input noise
voltage than JFETs (Konczakowska, 2010).
Fig 7: MOSFET frequency
band
Programming Tools used in the
Implementation of this Design
The
following programming tools are used in the implementation of the LNA design
namely; .NET framework, and visual studio.
The .NET Framework
The
.NET Framework provides a common set of services that application programs
written in .NET language such as C# can use to run on various operating systems
and hardware platforms. The .NET Framework is divided into two main components:
the .NET Framework Class Library and the Common Language Runtime (Joel, 2010).
The
.NET Framework Class Library consists of segment of pre-written code called
classes that provide many of the functions that you need for developing .NET
applications. For instance, the window forms classes are used for developing
window form applications. The ASP.NET classes are used for developing Web Forms
applications, and other classes let you work with databases, manage security,
access files and perform many other functions (Joel 2010).
Although
not apparent in figure.8, the classes in the .NET framework class library are
organized in a hierarchical structure. Within this structure, related classes
are organized into group called namespaces. Each namespace contains the classes
used to support a particular function. For example, the
namespace contains the classes used to create
forms and System.IO contains the classes used for work Input-Output operations
such as File and Streams operation.The Common Language Runtime (CLR) provides
the services that are needed for executing any application that is developed
with one .NET languages. This is possible because all of the .NET languages
compiled to a common intermediate language. The CLR also provides the Common
Type System that defines the data types that are used by all .NET languages
(Joel 2010).
Fig.8:
The .NET Framework
Visual Studio
Visual
Studio is Microsoft’s integrated programming environment. It lets you edit,
compile, run, and debug a C# program, all without leaving its well thought-out
environment. Visual Studio offers convenience and helps manage your programs.
It is most effective for larger projects, but it can be used to great success
with smaller programs.
Visual Studio 2008 is a fully integrated
development environment. It is designed to make the process of writing your
code, debugging it, and compiling it to an assembly to be shipped as easy as
possible. What this means is that Visual Studio gives you a very sophisticated
multiple - document - interface application in which you can do just about
everything related to developing your code. It offers these features (Christian
et al, 2008):
The IDE allows you to edit, compile, and
run a C# program and other programs
written in any of .NET languages such as J#, C++.Net, VB.Net and so on.
written in any of .NET languages such as J#, C++.Net, VB.Net and so on.
Fig.9: Visual Studio IDE
CHAPTER
THREE
METHODOLOGY
3.1
The Design Process
The design process started with studying available designs.
Some relevant circuits are reproduced and simulated using available CAD tool
(Multisim 10.0) to understand the engineering trade offs behind each design.
For each of the design studied; noise sensitivity, gain, operating frequency
were the focal parameters considered.
The design started with the direct
current (DC) and alternating current (AC) analysis of the circuit topologies,
calculations and proving which will be seen in design calculations.
Then the circuit was actualized in
Multisim 10.0 and simulated to confirm the functionality performance of the
circuit by measuring the stability factor, S-parameter, gain and operating
frequency using virtual network analyzer. The choice of either using a BJT or
MOSFET was also considered in which BJT was decided to be used. The flow chat
process of the design is drawn below.
Fig.10:
Flow Chart for LNA Design
The design specification below
explains the main concepts required for the realization of the LNA design.
3.2 Design Specifications
DC Biasing.
DC
biasing represents the first step in LNA design. The chosen DC bias circuit
should exhibit stable thermal performance and reduce the influence of hFE
spread. It also should be a cost effective and simple solution, one that does
not increase complexity of the design and preserves smallest possible size for
the overall LNA. Resistive feedback arrangement shown in Figure 9 below is the
simplest form of DC biasing
Fig.11: Typical LNA Biasing Circuit.
Two
bias feedback arrangements are possible. One with a combination of Rsup and Rb
and second one with a simple Re and Ce combination. The operation of the Rsup
and Rb is as follows: Rsup and Rb will establish a biasing point. Since the
operation of the LNA is going to be class A (constant current draw for dynamic
range of power levels), we want to have a stable biasing point (for BF822W at
10mA) over different temperatures and for different lot codes of transistors,
where a small variation in hfe can be expected. Vc in terms of Vsup and Isup
can be expressed as follows:
Vc V
sup I sup Rsup
As
Isup decreases, which could be the case with a part with lower hfe, Vc will
increase at the same time. With an increase of Vc, higher Ib will result. With
higher Ib, increase in Ic (~Isup) will take place up to a stable level set by
Rsup and Rb. The same circuit handles thermal variations well. With a
temperature increase, Isup will increase, which will lower Vc. Lower Vc will
result in lower Ib and lower Ib will lower Ic (~Isup). This circuit is
inexpensive, simple and takes very little real-estate, while its performance is
well behaved and understood. In order for Rb to have very little influence on
source matching, which is crucial for noise performance, the feedback network
should be decoupled with an inductor (making biasing invisible at RF band of
operation).
Another
possible bias feedback can be realized with emitter resistor and capacitor,
shown in shaded colors in Figure 9. With Isup (~Ie) decreasing, Ve will
decrease. Vbe will increase with a decrease in Ve. With increase in Vbe, Isup
will increase, while keeping a stable biasing point. Ce should be selected
carefully, since Re will also have a direct effect on RF gain of LNA. Ce should
present a short at frequency of operation in order to limit its influence on
gain and noise performance of the circuit.
Other
biasing methods are suitable for class A networks. These are usually closed
feedback
arrangements with dynamic bias control provided by active components (Dixit,
1994).
Although
suitable for LNA application, these active feedback bias networks increase
Complexity of the LNA network, introduce additional components and increase the
real estate Area of the solution.
More
so, The purpose of the DC bias is to select the proper quiescent point and hold
the quiescent point constant over variation in transistor parameters and temperature.
The bias circuitry should also decouple RF from DC. This is achieved by means
of blocking capacitors, which allow RF signals to pass, and RF chokes which
block the high frequency signals (Gonzalez, Guillermo. 1997).
Stability
Unconditional
stability means that with an arbitrary, passive load connected to the output of
the device, the circuit will not become unstable, i.e. will not oscillate.
Instabilities are primarily caused by three phenomena: internal feedback of the
transistor, external feedback around the transistor caused by external
circuits, or excess gain at frequencies outside of the band of operation.
The
main way of determining the stability of a device is to calculate the so-called
Rollett’s stability factor (K), which is calculated using a set of S-Parameters
for the device at the frequency of operation.
The conditions of stability at a given frequency are |Γin| < 1 and
|Γout| < 1, and must hold for all possible values ΓL & ΓS obtained using
passive matching circuits. We can calculate two stability parameters K and |Δ|
to give us an indication as to whether a device is likely to oscillate or
whether it is conditionally /unconditionally stable.
Where
The parameters K must satisfy K>1,
| |<1 0="" a="" and="" b="" be="" for="" greater="" must="" parameter="" span="" stable.="" the="" to="" transistor="" unconditionally="">
Where:
All devices with |S11| and |S22| <
1 must be stable for a passive load impedance (Lucek, Jarek, and Robbin Damen,
Sept. 2011).
Scattering Parameters
The
scattering or S-matrix is a mathematical, but also practical tool, that
quantifies how RF energy propagates through a multi-port network. The S-matrix
is what allows us to accurately describe the properties of complicated linear
networks. For an RF signal incident on one port, some fraction of the signal
bounces back out of that port, some of it scatters and exits other ports, and
some of it disappears as heat or even electromagnetic radiation. The S-matrix
for an N-port contains N2 individual S-Parameters, each one representing a
possible input-output path. The incident voltage is denoted by “a”, while the
voltage leaving a port is denoted by “b”. A generalized two-port network is
displayed in Figure 3 below.
Fig.12: Generalized two-port network
(Ludwig, Reinhold,
and Gene Bogdanov. 2009).
Here
is the matrix algebraic representation of 2-port S-parameters:
Where:
S11 is the input port voltage reflection
coefficient, and S11= b1/a1.
S12 is the reverse voltage gain, and S12= b1/a2.
S21 is the forward voltage gain, and S21= b2/a1.
S22 is the output port voltage reflection
coefficient, and S22= b2/a2. (Ludwig,
Reinhold, and Gene Bogdanov, 2009).
3.3 Design Calculations
Stage I
VBE
= 0.7V, β = 125;
Insert the values of R1 =
,
R2 =
,
R3 =10Ω, Vcc = 3V in equation 3.1
Looking at a closed loop around Ib in
the first stage transistor Q1
3.5
3.7
20k
=
)
= 37.32Ω
3.10
Input Impedance;
3.11
In decibel; 10log (0.214) =
-6.6959dB
Note Vf is parallel to Vcc
= 3V, R5=Rf = 500Ω , RL = R4 =133
Stage II
Taking a close Loop at the second
amplifier stage;
Total
Current is
3.17
3.18
;
3.19
XL2=
2πfL = 2π x 2.2 x 109 x 2.7 x 10-9 = 37.32Ω 3.20
ro = XL2 // RE =
37.32//200
3.21
3.22
In decibel = 10 log(31.45) = 14.98dB
Voltage
Gain
3.23
In Decibel
20log
=
16.6dB 3.24
Output Third Order Intercept Point
(IP3)
Input Third Order Intercept Point
(IP3)
Capacitance Calculations Of LNA
AT C1
The
input resistance at C1 is 620.29
from equation 3.26;
Hence
the
AT C2
The
input resistance at C2 is 620.29
from equation 3.26;
Hence
the
AT C3
The
resistance at C3 is 500Ω;
Hence
the
AT C4
The
resistance at C4 is
from equation 3.30;
Hence
the
Stability Of The LNA Circuit
S11
= 0.701; S12 = 0.024; S21 = 1.029; S22 = 0.749
Unconditionally
stable at 2.2 Ghz (k>1)
LNA Sensitivity
(Sandeen, 2008)
F1
is the thermal noise generated at the input resistance
F2
is the noise generated at the first stage transistor which is 2.1dB from the
datasheet, F3 is the noise generated at the second stage transistor
which is 2.1dB from the datasheet, F4 is the thermal noise generated
at the output resistance
(Kinget, 1999).
A good signal quality factor varies
from 10 – 50. Hence, assuming for a good signal quality to be 50 for this
design.
Where: BW = 2.2*109
= 44Mhz
50
Therefore:
3.4 Complete Circuit
Design Of LNA
As
shown below, the complete circuit diagram is also shown in Chapter Four as
drawn using
Multisim.
Fig.13:
Designed LNA Circuit ( Fadamiro and Ogunti, Asian Journal of Engineering
and Technology, June 2013 )
CHAPTER FOUR
Design
Simulations
In
this section, simulation results from Multisim 10.0 will be presented. Shown in
figure 12 is the simulation result of stability which determines the
effectiveness of the circuit. As stated earlier, for an LNA circuit to be
stable and effective, Delta must be lesser than one while Rollett’s stability
factor (K) must be greater than one. Other simulations are presented alongside.
Fig.14: Stability Simulation
Fig.15: Gains Simulation
Fig.16: Simulation of S-parameters
Fig.17: Simulation with an Oscilloscope
4.1 Discussions
The
design of an LNA for a wireless mode of operation at a high frequency range of
2.0 GHz - 2.2 GHz with a good gain is determined majorly by the quality of RF
transistor used in the design. The results derived after simulation using
multisim 10 are shown in fig14, fig15, fig16, and 17 while the calculated in
comparison with the simulated results are shown in the tables below.
Table
1: Calculated and Simulated results for
Delta and Rollett’s factor at 2.2GHz
Frequency (2.2GHz)
|
Calculated
|
Simulated
|
Delta (
)
|
0.50
|
0.14
|
Rollett’s Factor (K)
|
4.0
|
17.465
|
Table
2: Measurements of LNA Gains
Frequency
|
Power Gain (PG)
|
Average Power Gain (APG)
|
Total Power Gain
|
2.2GHz
|
-55.434dB
|
-47.118dB
|
-55.525dB
|
2GHz
|
-55.021dB
|
-47.169dB
|
-55.131dB
|
1.5GHz
|
-53.908dB
|
-46.34dB
|
-54.101dB
|
1GHz
|
-52.475dB
|
-45.331dB
|
-52.898dB
|
900MHz
|
-52.085dB
|
-45.069dB
|
-52.601dB
|
Table
3: Measurements of Voltages and Currents
with MULTISM
Frequency (2.2GHz)
|
Input
|
Output
|
V
|
3.90Mv
|
-318pV
|
V
(p-p)
|
9.94Mv
|
767pV
|
V
(rms)
|
3.54mV
|
275pV
|
V
(dc)
|
-428Nv
|
0V
|
I
|
390Na
|
-6.35pA
|
I
(p-p)
|
994nA
|
15.3pA
|
I
(rms)
|
353Na
|
5.50pA
|
I
(dc)
|
-42.8Pa
|
0A
|
Freq
|
2.2GHz
|
2.2GHz
|
This
design was based on 50 W
input and output impedance considering the fact that most RF designs are
designed to be 50W.
The gain and the noise generated which are very essential in LNA design are
analyzed carefully so that adequate signal propagated can be received with
minimal signal to noise ratio.
CHAPTER FIVE
RECOMMENDATION AND CONCLUSION
The
system was simulated using ADS (Multisim 10.0), an RF circuit simulator. The
design went through a series of tests and measurements for verification. The
data from these measurements was recorded, documented, and compared to the
simulated predictions. Meanwhile, there might have been several discrepancies
in the above results. Some possible discrepancies are measurement errors by the
reading, non-equality of the components and most importantly the simulating
tool used (network analyzer).
However,
The degree of success of this project was quite satisfactory. the design
proposed is efficiently used in the Wireless Communication applications for
amplifying the Wideband RF signals at 2.2GHz with a gain of 10.59dB,
sensitivity of -123.95dBm and Low Noise
Figure of -38.39dB.
Conclusively,
the time spent in studying the design process of a microwave amplifier and the designed
tools learned served as a great experience and preparation for the future
designing endeavors.
Future Work
The
amplification of this LNA has a reasonably gain value at the center frequency
of 2.2GHz. But, there might have been several discrepancies in the above
results. Some possible discrepancies are measurement errors by the reading,
non-equality of the components and most importantly the simulating tool used
(network analyzer). However, we believe that spending more time and effort in
better layout design will result in smaller lost in power gain at higher
frequencies.
Due
to the high potential of this work, here we propose several future works to be
done. Firstly, while we have covered and explored deeply on the topic of LNA,
other important blocks such as mixer, post-mixer baseband amplifier,
channel-select filter, analog to-digital converter, and frequency synthesizer
should be designed. The study on system level design for the IEEE 802.15.4
standard therefore should be deeply investigated. We believe that significantly
power consumption can be saved by further exploring the performance trade-offs
in the IEEE 802.15.4 standard. To achieve an ultra-low power system, novelty in
both system and circuit design are required.
Thirdly,
while bringing in benefit such as higher level of integration and higher ,
technology scaling also creates many issues for RFIC designer. Aggressive CMOS
technology scaling results in supply voltage reductions to well below 1V. At
low supply voltage, it is very challenging for critical blocks such as mixer
and baseband circuits to achieve sufficient linearity. Moreover, RF/analog
circuits are sensitive to leakage and process variations at deeply scaled CMOS
technologies. This requires a more accurate device modeling.
Lastly,
the unlicensed band around 60 GHz presents interesting prospects for
high-data-rate applications such as high-definition video streaming.
Furthermore, the short wavelength makes it possible to integrate one or more
antennas along with the transceiver, thus obviating the need for expensive,
millimeter-wave packaging and high-frequency electrostatic discharge (ESD)
protection devices. The heightened interest in this band for consumer applications
has motivated research on the design of 60 GHz building blocks in CMOS
technology. This is very challenging due to the lossy substrate, low ft and
fmax of current CMOS technologies. Moreover, the low Q characteristic
of an on-chip inductor has limited its usefulness in millimeter wave designs.
New design methods incorporating microwave techniques and complex passive
structures are needed to improve circuit performance. Example of such works
are: transmission lines and distributed elements are being investigated and
applied to the design of typical transceiver building blocks such as the LNA,
VCO/PLL, mixer, and PA (Doan, Emami, Niknejad, And Brodersen, 2005).
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